School / Prep
ENSEIRB-MATMECA
Study level
Bac + 4
Internal code
ESE8-NUMU2
Description
Theoretical and practical module for joint design on FPGAs. A project is carried out during all sessions, enabling students to follow the design flow of a heterogeneous system, and to experience the problems of the discipline from the point of view of the embedded system architect, the VHDL developer and the software developer.
Objectives
Skills developed through this module :
- Analyze and use digital circuit design methods for embedded systems - Level 2
- Analyze and use programmable architecture for embedded systems - level 2
- Designing and implementing a program written in C/C++ for embedded systems - level 2
- Designing and implementing a digital architecture for embedded systems - Level 2
Teaching hours
- CIIntegrated courses28h
Mandatory prerequisites
VHDL for FPGA
-C/C++
-Computer architecture
Syllabus
Introduction to Codesign
-HW/SW comparison
-System On Chip
-Embedded system architect
-Co-design flow
-Microblaze SoftCore (pipeline, ALU, FSL bus)
-Design reuse
-VHDL coding rules
Bibliography
Specifications will be provided
Assessment of knowledge
Initial assessment / Main session - Tests
Type of assessment | Type of test | Duration (in minutes) | Number of tests | Test coefficient | Eliminatory mark in the test | Remarks |
---|---|---|---|---|---|---|
Project | Report | 1 |
Second chance / Catch-up session - Tests
Type of assessment | Type of test | Duration (in minutes) | Number of tests | Test coefficient | Eliminatory mark in the test | Remarks |
---|---|---|---|---|---|---|
Project | Report |