School / Prep
ENSEIRB-MATMECA
Internal code
EE8EN210
Description
The aim of this module is to assemble elementary functions (combinatorial and sequential) to create a programmable processor with an elementary instruction set. The architecture designed will be integrated on an FPGA prototyping board.
The processor to be designed is a general-purpose 8-bit processor. It is capable of executing 4 types of instructions. The processor is based on an 8-bit accumulator register called ACCU. Each instruction is coded on 8 bits. Two bits to encode the type of operation (code.op) and 6 bits to encode the operand or the operand address in memory, depending on the type of instruction.
Teaching hours
- CIIntegrated Courses24h
Mandatory prerequisites
EN102, EN103, EN201, EN202
Syllabus
During the first sessions, the typical simplified architecture of general-purpose processors is detailed. This is followed by table-top work leading to the definition of a hierarchical block diagram of the processor.
The remaining sessions are devoted to processor design using the VHDL language in Xilinx's Vivado environment.
Further information
Digital Electronics
Bibliography
1 course support and 1 practical support.
Assessment of knowledge
Initial assessment / Main session - Tests
Type of assessment | Type of test | Duration (in minutes) | Number of tests | Test coefficient | Eliminatory mark in the test | Remarks |
---|---|---|---|---|---|---|
Integral Continuous Control | Continuous control | 2 |