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Processor design with elementary instruction set

  • School / Prep

    ENSEIRB-MATMECA

Internal code

EE8EN210

Description

The aim of this module is to assemble elementary functions (combinatorial and sequential) to create a programmable processor with an elementary instruction set. The architecture designed will be integrated on an FPGA prototyping board.
The processor to be designed is a general-purpose 8-bit processor. It is capable of executing 4 types of instructions. The processor is based on an 8-bit accumulator register called ACCU. Each instruction is coded on 8 bits. Two bits to encode the type of operation (code.op) and 6 bits to encode the operand or the operand address in memory, depending on the type of instruction.

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Teaching hours

  • CIIntegrated Courses24h

Mandatory prerequisites

EN102, EN103, EN201, EN202

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Syllabus

During the first sessions, the typical simplified architecture of general-purpose processors is detailed. This is followed by table-top work leading to the definition of a hierarchical block diagram of the processor.
The remaining sessions are devoted to processor design using the VHDL language in Xilinx's Vivado environment.

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Further information

Digital Electronics

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Bibliography

1 course support and 1 practical support.

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Assessment of knowledge

Initial assessment / Main session - Tests

Type of assessmentType of testDuration (in minutes)Number of testsTest coefficientEliminatory mark in the testRemarks
Integral Continuous ControlContinuous control2