Processor design with elementary instruction set

The aim of this module is to assemble elementary functions (combinatorial and sequential) to create a programmable processor with an elementary instruction set. The architecture designed will be integrated on an FPGA prototyping board.

The processor to be designed is a general-purpose 8-bit processor. It is capable of executing 4 types of instructions. The processor is based on an 8-bit accumulator register called ACCU. Each instruction is coded on 8 bits. Two bits to encode the type of operation (code.op) and 6 bits to encode the operand or the operand address in memory, depending on the type of instruction.

The VHDL language and the Vivado environment from Xilinx.

The module is divided into 3 sessions of 4 hours each. In the first session, the typical simplified architecture of general-purpose processors is detailed. This is followed by table-top work leading to the definition of a hierarchical block diagram of the processor. The other two sessions are devoted to designing the processor using VHDL in Xilinx's Vivado environment.

1 course aid and 1 design aid.