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EE7EN202 - VHDL/FPGA Design

  • School / Prep

    ENSEIRB-MATMECA

  • Study level

    Bac + 4

Internal code

EE7EN202

Description

This module teaches how to design a digital circuit on FPGA support.

The first part of the program includes guided practical exercises, using a complete example to illustrate the design process: writing the VHDL description, synthesis in a CAD environment, circuit testing on a prototype board. 

In the second part, each student defines his or her own specifications for a digital circuit and implements them on FPGA.  

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Objectives

Mastery of the principles, languages and tools for synthesizing FPGA-based digital circuits.

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Teaching hours

  • TDMMachine Tutorial39h
  • TIIndividual work18h

Mandatory prerequisites

Master the VHDL language.

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Knowledge control

Continuous control including presentation and demonstration of the designed circuit

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Further information

Digital electronics

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Assessment of knowledge

Initial assessment / Main session - Tests

Type of assessmentType of testDuration (in minutes)Number of testsTest coefficientEliminatory mark in the testRemarks
Integral Continuous ControlContinuous control1